A SERVICE OF

logo

DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126
Issue 4
June 1999
Additional Maintenance Procedures
6-12DS1 CPE Loopback Jack (T1 Only)
6
The first part of the span test powers-up the loopback jack and attempts to send
a simple code from the DS1 board, through the wiring and loopback jack, and
back to the DS1 board. Maintenance software waits about 10 seconds for the
loopback jack to loop, sends the indication of the test results to the management
terminal, and proceeds to the second part of the test.
The second part of the test sends the standard DS1 3-in-24 stress testing pattern
from the DS1 board, through the loopback jack, and back to a bit error detector
and counter on the DS1 board. The bit error rate counter may be examined at will
via the management terminal, and provides the results of the second part of the
test. The test remains in this state until it is terminated so that the CPE wiring may
be bit error rate tested for as long as desired.
1. Busy out the DS1 circuit pack by entering
busyout board UUCSS
.
2. At the management terminal, enter
change ds1
location
and verify the
near-end csu type
is set to
integrated
.
3. Change to page 2 of the DS1 administration form and confirm that the
TX
LBO
field is
0
(dB). If not, record the current value and change it to 0 dB for
testing. Press
Enter to implement the changes or press Cancel to change
nothing.
4. Enter
test ds1-loop
location
cpe-loopback-jack
. This turns on simplex
power to the loopback jack and waits about 20 seconds for any active
DS1 facility alarms to clear. A “PASS” or “FAIL” displays on the terminal.
This is the first of the 2 results. A “FAIL” indicates a fault is present in the
wiring between the ICSU and the loopback jack. The loopback jack may
also be faulty. A “PASS” only indicates that the loopback jack looped
successfully, not that the test data contains no errors. If a “PASS” is
obtained, continue with the following steps.
NOTE:
The loss of signal (LOS) alarm (demand test #138) is not processed
during this test while the 3-in-24 pattern is active.
5. Enter
clear meas ds1 loop <location>
to clear the bit error count.
6. Enter
clear meas ds1 log <location>
to clear the performance
measurement counts.
7. Enter clear meas ds1 esf <location> to clear the ESF error count.
8. Enter list meas ds1 sum <location> to display the bit error count. Refer
to Table 6-3
for troubleshooting information.