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Page 716 of 906 NTAK09 1.5 Mb DTI/PRI card
553-3001-211 Standard 3.00 August 2005
Digital pad
The digital pad is an EPROM whose address-input to data-output transfer
function meets the characteristics of a digital attenuator. The digital pad
accommodates both µ255-law and A-Law coding. There are 32 combinations
each for µ255 to µ255, µ255 to A-Law, A-Law to µ255, and A-Law to A-Law.
These values are selected to meet the EIA loss and level plan. See Table 231.
Table 231
Digital pad values and offset allocations
Offset PAD set 0 PAD set 1
0 0dB –7db
1 2dB –8db
2 3dB –9db
3 4dB –10db
4 5dB 0.6db
5 6.1dB 7db
6 8dB 9db
7 –1dB 10db
8 –3dB 11db
9 –4dB 12db
A idle code, 7F 3db
B unassigned code, FF 14db
C 1dB spare
D –2dB spare
E –5db spare
F –6db spare