EM78P221/2N
8-Bit Microcontroller with OTP ROM
Product Specification (V1.0) 10.19.2007 • 49
(This specification is subject to change without further notice)
6.11.2 Code Option Register (Word 1)
Word 1
Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
- -
RESET
ENB
RCOUT NRHL NRE - C3 C2 C1 C0 RCM1 RCM0
Bit 12: Not used (reserved), fixed to “1” all the time.
Bit 11: Not used (reserved), fixed to “0” all the time.
Bit 10 (RESETENB): P81/RESET pin select bit
0 = P81 set as /RESET pin
1 = P81 is general purpose input pin or open drain for output port
(Default)
Bit 9 (RCOUT): System clock output enable bit in IRC or ERC mode
0 = OSCO pin is open drain
1 = OSCO output instruction clock (Default)
Bit 8 (NRHL): Noise rejection high/low pulse define bit. INT pin has a falling edge
trigger.
0 = Pulses equal to 8/fc are regarded as signal
1 = Pulses equal to 32/fc are regarded as signal (Default)
NOTE
NRHL and NRE are at Bank 3-R7, when using ICE.
Bit 7 (NRE): Noise rejection enable
0 = disable noise rejection
1 = enable noise rejection (default). However in Low Crystal oscillator
(LXT2) mode, the noise rejection circuit is always disabled.
NOTE
The noise rejection function is turned off in LXT2 and sleep mode.
Bit 6: Not used (Reserved). This bit is set to “1” all the time.
NOTE
C3, C2, C1, C0, RCM1 and RCM0 are at Bank 3-R6, when using ICE.
Bits 5~2 (C3~C0): Internal RC mode Calibration bits. These bits must always be set
to “1” only (auto calibration)
