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EM78P221/2N
8-Bit Microcontroller with OTP ROM
Product Specification (V1.0) 10.19.2007 7
(This specification is subject to change without further notice)
6 Function Description
6.1 Register Configuration
Address Bank 0 Registers Bank 1 Registers Bank 2 Registers Bank 3 Registers
00 R0 (Indirect Addressing Register)
01 R1 (Memory switch register)
02 R2 (Program Counter)
03 R3 (Status Register)
04 R4 (Select Indirect Address)
05 R5 (Port 5)
R5 (I/O Port Control
Register)
R5 (High Drive Control
Register for Port 6)
R5 (Timer Clock /
Counter)
06 R6 (Port 6)
R6 (I/O Port Control
Register)
R6 (High Sink Control
Register for Port 5)
Reserve*
07 R7 (Port 7)
R7 (I/O Port Control
Register)
R7 (High Sink Control
Register for Port 6
Reserve*
08 R8 (Port 8)
R8 (I/O Port Control
Register)
Reserve Reserve
09 Reserve Reserve Reserve Reserve
0A Reserve
RA (Comparator Control
Register)
Reserve Reserve
0B Reserve
RB (Pull-down Control
Register)
Reserve Reserve
0C Reserve
RC (Open-drain Control
Register)
Reserve Reserve
0D Reserve
RD (Pull-high Control
Register)
Reserve Reserve
0E
RE (Wake-up Control
Register)
RE (WDT Control
Register)
Reserve Reserve
0F
RF (Interrupt Status
Register)
RF (Interrupt Mask
Register)
Reserve Reserve
10
:
1F
General Registers (16×8 bits)
20
:
3F
General Registers
(32×8 bits)
General Registers
(32×8 bits)
General Registers
(32×8 bits)
General Registers
(32×8 bits)
Note: 1. All registers are 8 bits.
2. When using ICE, some registers code options are set. Refer to Section 6.2 for detailed Registers Description.
3. Registers with * can only be used in ICE220N simulator.