EM78P221/2N
8-Bit Microcontroller with OTP ROM
12 •
Product Specification (V1.0) 10.19.2007
(This specification is subject to change without further notice)
6.2.13 Bank 0-RE (WUCR: Wake-up Control Register)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
EX1IF 0 0 ICWE 0 CMPWE 0 CMPIF
Bit 7 (EX1IF): External interrupt flag. Set by INT1 pin, reset by software.
0 = no interrupt occurs
1 = with interrupt request
Bits 6~5, 3, 1: not used bits, fixed to 0 all the time
Bit 4 (ICWE): Port 6 input change to wake-up status enable bit
0 = Disable Port 6 input change to wake-up status
1 = Enable Port 6 input change wake-up status
When the Port 6 Input Status Change is used to enter interrupt vector or
to wake-up EM78P221N//2N from sleep, the ICWE bit must be set to
“Enable“.
Bit 2 (CMPWE): Comparator wake-up enable bit
0 = Disable Comparator wake-up
1 = Enable Comparator wake-up
When the Comparator output status change is used to enter interrupt
vector or to wake-up from sleep, the CMPWE bit must be set to
“Enable“.
Bit 0 (CMPIF): Comparator interrupt flag. Set when a change occurs in the output of
Comparator. Reset by software.
0 = no interrupt occurs
1 = with interrupt request
NOTE
■ Bank 0-RE <7, 0> can be cleared by instruction but cannot be set.
■ Bank1-RE <0> is an interrupt mask register.
■ Interrupt results from "logic AND" of Bank 0-RE <7, 0> and Bank 1-RE <0>, with
instruction “ENI”.
6.2.14 Bank 0-RF (Interrupt Status Register)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 0 0 0 EX0IF ICIF TCIF
Bits 7~3: not used bits, fixed to 0 all the time
Bit 2 (EX0IF): External interrupt flag. Set by INT0 pin. Reset by software.
0 = no interrupt occurs
1 = with interrupt request
