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Architecture
184
SRLV Shift Right Logical Variable SRLV
31 26 25 21 20 16 15 11 10 6 5 0
SPECIAL
000000
rs rt rd
0
00000
SRLV
000110
6 5 5 5 5 6
Format :
SRLV rd, rt, rs
Description :
Right-shifts the contents of general register rt (by the number of bits designated in the low-order five
bits of general register rs), zero-fills the high-order bits, and puts the result in register rd.
Operation :
T:
s GPR[rs]
4..0
GPR[rd] 0
s
|| GPR[rt]
31..s
Exceptions :
None