AMI BIOS Setup
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installed in the system. Setting options: 2 Clocks, 3 Clocks.
RAS# to CAS# Delay
When DRAM is refreshed, both rows and columns are addressed separately.
This setup item allows you to determine the timing of the transition from RAS
(row address strobe) to CAS (column address strobe). The less the clock cycles,
the faster the DRAM performance. Setting options: 3 Clocks, 2 Clocks.
Precharge Delay
This setting controls the precharge delay, which determines the timing delay
for DRAM precharge. Setting options: 5 Clocks, 6 Clocks, 7 Clocks.
DRAM Integrity Mode
Select ECC (Error-Checking & Correcting Code) or Non-ECC according to the
type of DRAM installed.
AGP Aperture Size
The field selects the size of the Accelerated Graphics Port (AGP) aperture.
Aperture is a portion of the PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the aperture range are forwarded
to the AGP without any translation. Settings: 4MB, 8MB, 16MB, 32MB, 64MB,
128MB, 256MB.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delayed
transactions cycles. Select Enabled to support compliance with PCI specifica-
tion version 2.1. Settings: Enabled and Disabled.
