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Chapter 36 Input Capture
4.Register
4. Register
4.1 IPCP: Input Capture Data Register
A register that, using changes in an external signal as a trigger, stores the free-run timer count and can read it
out later.
• IPCP0 (Input capture 0): Address 0184h (Access: Half-word, Word)
• IPCP1 (Input capture 1): Address 0186h (Access: Half-word, Word)
• IPCP2 (Input capture 2): Address 0188h (Access: Half-word, Word)
• IPCP3 (Input capture 3): Address 018Ah (Access: Half-word, Word)
• IPCP4 (Input capture 4): Address 02D4h (Access: Half-word, Word)
• IPCP5 (Input capture 5): Address 02D6h (Access: Half-word, Word)
• IPCP6 (Input capture 6): Address 02D8h (Access: Half-word, Word)
• IPCP7 (Input capture 7): Address 02DAh (Access: Half-word, Word)
(For information on attributes, see “Meaning of Bit Attribute Symbols (Page No.10)”.)
• Stores the free-run timer 0 count value for the input signal from external pins (ICU0, ICU1) using the signal
change (edge) selected by active edge selection bits (ICS01.EG[01:00]), (ICS01.EG[11:10]).
• Input capture 0 and input capture 1 store the count value of the free-run timer.
15 14 13 12 11 10 9 8 bit
CP15 CP14 CP13 CP12 CP11 CP10 CP9 CP8
X X X X X X X X Initial value
R/WX R/WX R/WX R/WX R/WX R/WX R/WX R/WX Attribute
76543210bit
CP7 CP6 CP5 CP4 CP3 CP2 CP1 CP0
X X X X X X X X Initial value
R/WX R/WX R/WX R/WX R/WX R/WX R/WX R/WX Attribute
