Toshiba TMP92CZ26AXBG Manual

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TMP92CZ26A

92CZ26A-480

(c) <DOSTAT>

Set the status of SPDO pin when data communication is not operating (after

transmitting or during receiving).

Please don't change the setting of this register when transmitting/receiving is in

operation.

(d) <TCPOL>

Select the edge of synchronous clock.

Please change the setting when <XEN>bit is “0”. And set the same value as <RCPOL>.

Figure 3.17.4 <TCPOL> Register Function

(e) <RCPOL>

Select the edge of synchronous clock during receiving.

Please change the setting during SPIMD<XEN>= “0”. And set the same value as

<TCPOL>.

Figure 3.17.5 <TCPOL>Register Function

(f) <TDINV>

Select logical invert/no invert when outputs transmitted data from SPDO pin.

Please don't change the setting of this register when transmitting/receiving is in

operation.

(g) <RDINV>

Select logical invert/no invert for received data from SPDI pin.

Please don't change the setting of this register when transmitting/receiving is in

operation.

SPDO pin

Bit0

Bit1

Bit2

Bit3

Bit4

Bit7

MSB

SPCLK pin (<TCPOL>= “1”)

LSB

SPCLK pin (<TCPOL> = “0”)

LSB

SPCLK pin (<RCPOL>=”0”)

SPDI pin

Bit0 Bit1

Bit2

Bit3

Bit4

MSB

SPCLK pin (<RCPOL>=”1”)